,ll 6.6
,cs 10
,pl 66
,lm 0.2,0.5
,pn 12
,ju
,hd
,ce
OmegaSoft 6809 Cross Relocatable Macro Assembler (V1.0)
,,
,ft

,ce 1
10-##
,,
,ce
OmegaSoft 6809 Cross Relocatable Macro Assembler (V1.0)

,ce
INSTRUCTION SUMMARY

INSTR         DESCRIPTION            IMM  DIR  EXT  IDX  INH  REL

ABX     B (UNSIGN) + X -> X                               X

ADCA    A + M + c -> A                X    X    X    X
ADCB    B + M + c -> B                X    X    X    X

ADDA    A + M -> A                    X    X    X    X
ADDB    B + M -> B                    X    X    X    X
ADDD    D + M:M+1 -> D                X    X    X    X

ANDA    A and M -> A                  X    X    X    X
ANDB    B and M -> B                  X    X    X    X
ANDCC   CC and M -> CC                X

ASLA    A }      <---                                     X
ASLB    B } [] <- [] [] [] <- 0                           X
ASL     M }  c    b7    b0                 X    X    X

ASRA    A }      --->                                     X
ASRB    B } [] [] [] -> []                                X
ASR     M } b7    b0     c                 X    X    X

BCC     branch if carry clear                                  X
BCS     branch if carry set                                    X
BEQ     branch if equal to zero                                X
BGE     branch if >= zero (signed)                             X
BGT     branch if > zero (signed)                              X
BHI     branch if > zero (unsigned)                            X
BHS     branch if >= zero (unsigned)                           X

BITA    M and A sets CC               X    X    X    X
BITB    M and B sets CC               X    X    X    X

BLE     branch if < zero (signed)                              X
BLO     branch if <= zero (unsigned)                           X
BLS     branch if <= zero (signed)                             X
BLT     branch if < zero (signed)                              X
BMI     branch if minus (b7 set)                               X
BNE     branch if not equal to zero                            X
BPL     branch if plus (b7 clear)                              X
BRA     branch always                                          X
BRN     branch never                                           X
BSR     branch to subroutine                                   X
BVC     branch if overflow clear                               X
BVS     branch if overflow set                                 X

CLC     0 -> c                                            X
CLRA    0 -> A                                            X
CLRB    0 -> B                                            X
CLR     0 -> M                             X    X    X

CMPA    A - M sets CC                 X    X    X    X
CMPB    B - M sets CC                 X    X    X    X
CMPD    D - M:M+1 sets CC             X    X    X    X
CMPS    S - M:M+1 sets CC             X    X    X    X
CMPU    U - M:M+1 sets CC             X    X    X    X
CMPX    X - M:M+1 sets CC             X    X    X    X
CMPY    Y - M:M+1 sets CC             X    X    X    X
,pg
,ce
INSTRUCTION SUMMARY

INSTR         DESCRIPTION            IMM  DIR  EXT  IDX  INH  REL

COMA    not A -> A                                        X
COMB    not B -> B                                        X
COM     not M -> M                         X    X    X

CWAI    CC and M then wait            X

DAA     Decimal adjust A                                  X

DECA    A - 1 -> A                                        X
DECB    B - 1 -> B                                        X
DEC     M - 1 -> M                         X    X    X

EORA    A eor M -> A                  X    X    X    X
EORB    B eor M -> B                  X    X    X    X

EXG     reg1 <--> reg2                X

INCA    A + 1 -> A                                        X
INCB    B + 1 -> B                                        X
INC     M + 1 -> M                         X    X    X

JMP     addr -> PC                         X    X    X
JSR     JUMP to subroutine                 X    X    X

LBCC    branch if carry clear                                  X
LBCS    branch if carry set                                    X
LBEQ    branch if equal to zero                                X
LBGE    branch if >= zero (signed)                             X
LBGT    branch if > zero (signed)                              X
LBHI    branch if > zero (unsigned)                            X
LBHS    branch if >= zero (unsigned)                           X
LBLE    branch if < zero (signed)                              X
LBLO    branch if <= zero (unsigned)                           X
LBLS    branch if <= zero (unsigned)                           X
LBLT    branch if < zero (signed)                              X
LBMI    branch if minus (b7 set)                               X
LBNE    branch if not equal to zero                            X
LBPL    branch if plus (b7 clear)                              X
LBRA    branch always                                          X
LBRN    branch never                                           X
LBSR    branch to subroutine                                   X
LBVC    branch if overflow clear                               X
LBVS    branch if overflow set                                 X

LDA     M -> A                        X    X    X    X
LDB     M -> B                        X    X    X    X
LDD     M:M+1 -> D                    X    X    X    X
LDS     M:M+1 -> S                    X    X    X    X
LDU     M:M+1 -> U                    X    X    X    X
LDX     M:M+1 -> X                    X    X    X    X
LDY     M:M+1 -> Y                    X    X    X    X

LEAS    addr -> S                                    X
LEAU    addr -> U                                    X
LEAX    addr -> X                                    X
LEAY    addr -> Y                                    X
,pg
,ce
INSTRUCTION SUMMARY

INSTR         DESCRIPTION            IMM  DIR  EXT  IDX  INH  REL

LSLA    A }       <---                                    X
LSLB    B } [] <- [] [] [] <- 0                           X
LSL     M }  c    b7    b0                 X    X    X

LSRA    A }       --->                                    X
LSRB    B } 0 -> [] [] [] -> []                           X
LSR     M }      b7    b0     c            X    X    X

MUL     A * B -> D                                        X

NEGA    not A + 1 -> A                                    X
NEGB    not B + 1 -> B                                    X
NEG     not M + 1 -> M                     X    X    X

NOP     no operation                                      X

ORA     A or M -> A                   X    X    X    X
ORB     B or M -> B                   X    X    X    X
ORCC    CC or M -> CC                 X

PSHS    push reg. list on S stack     X
PSHU    push reg. list on U stack     X
PULS    pull reg. list off S stack    X
PULU    pull reg. list off U stack    X

ROLA    A } --------------------                          X
ROLB    B } -[] <- [] [] [] <---                          X
ROL     M }   c    b7    b0                X    X    X

RORA    A } --------------------                          X
RORB    B } ---> [] -> [] [] []-                          X
ROR     M }       c    b7    b0

RTI     return from interrupt                             X
RTS     return from subroutine                            X

SBCA    A - M - c -> A                X    X    X    X
SBCB    B - M - c -> B                X    X    X    X

SCALL   system call M                 X

SEC     1 -> c                                            X

SEX     sign extend B into A                              X

STA     A -> M                             X    X    X
STB     B -> M                             X    X    X
STD     D -> M:M+1                         X    X    X
STS     S -> M:M+1                         X    X    X
STU     U -> M:M+1                         X    X    X
STX     X -> M:M+1                         X    X    X
STY     Y -> M:M+1                         X    X    X

SUBA    A - M -> A                    X    X    X    X
SUBB    B - M -> B                    X    X    X    X
SUBD    D - M:M+1 -> D                X    X    X    X
,pg
,CE
INSTRUCTION SUMMARY

INSTR         DESCRIPTION            IMM  DIR  EXT  IDX  INH  REL

SWI     software interrupt 1                              X
SWI2    software interrupt 2                              X
SWI3    software interrupt 3                              X

SYNC    synchronize to interrupt                          X

TFR     reg1 -> reg2                  X

TSTA    test A sets CC                                    X
TSTB    test B sets CC                                    X
TST     test M sets CC                     X    X    X

DEFINITIONS :

A, B, D, X, Y, U, S, CC, PC      contents of 6809 registers
c                                carry bit in CC
M                                8 bit contents of memory
M:M+1                            16 bit contents of memory
